Technical Field
The present invention relates to field effect transistors, and more particularly to fin-including field effect transistor (FinFET) devices with dielectrically isolated crystalline fin surfaces for promoting epitaxial growth in source/drain regions.
Description of the Related Art
Dielectric layers employed in silicon-on-insulator (SOI) FinFET devices isolate circuitry in a way that is superior to the isolation provided by the bulk FinFET devices. The punch-through stop doping employed in the bulk FinFET configuration is not as effective in this regard when compared to the isolation provided by a dielectric layer, e.g., an oxide layer.
To improve source-drain to channel junction sharpness in a FinFET configuration, the fins in a source/drain region are recessed before epitaxially growing the in-situ doped source/drain epitaxial layer. This contrasts with bulk FinFET configurations where recessing the source/drain does not cause an epitaxial layer growth issue. In the bulk FinFET configuration, the remaining fin provides an effective seed layer for growing a good epitaxial coating on the {100} lattice plane. For SOI FinFET, however, once the fins in the source/drain regions are recessed in the oxide layers, there is no seed layer on which to grow an epitaxial layer. Source/drain epitaxy growth could occur on the fin sidewalls, but these surfaces are oriented in the {110} lattice plane and are not well-suited for seeding epitaxial growth. Furthermore, where there is no recess, the dopant in the epitaxy layer is further away from the fin channel when compared with the recessed case. After a thermal anneal is performed to form the overlap junction between source/drain and gate, the junction has a higher gradient than when not recessed, which degrades device performance.